|Student Contribution Band:||Band 2|
|Administered by:||College of Science and Engineering|
This subject develops the theory and practice of designing logic systems, with a focus on Field Programmable Gate Arrays (FPGAs). A hardware description language is used to design, simulate, and synthesise digital hardware, including both combinational and sequential logic. Topics include: logic design fundamentals, the VHDL language, finite state machines, and designing for testability.
|Cairns, Study Period 1, Internal|
|Census Date 28-Mar-2019|
|Coord/Lect:||Dr Yang Du.|
The student workload for this 3 credit point subject is approximately 130 hours.
|Assessment:||end of semester exam (50%); practical labs (10%); assignments (40%).|
Note: Minor variations might occur due to the continuous Subject quality improvement process, and in case of minor variation(s) in assessment details, the Subject Outline represents the latest official information.