JCU Australia logo

Subject Search

CC4510 - Digital System Design

Credit points: 3
Year: 2022
Student Contribution Band: Band 2
Administered by: College of Science and Engineering

This subject develops the theory and practice of designing logic systems, with a focus on Field Programmable Gate Arrays (FPGAs). A hardware description language is used to design, simulate, and synthesise digital hardware, including both combinational and sequential logic. Topics include: logic design fundamentals, the VHDL language, finite state machines, and designing for testability.

Learning Outcomes

  • Understand digital design methodologies and the role of programmable logic devices;
  • Design digital logic based upon system requirements;
  • Implement logic designs in a hardware description language;
  • Evaluate logic designs using hardware simulation tools to test for correctness and issues of timing;
  • Synthesise digital logic to field programmable gate arrays (FPGAs) and validate the resulting implementation.

Subject Assessment

  • Written > Examination (centrally administered) - (50%) - Individual
  • Written > Test/Quiz 1 - (10%) - Individual
  • Performance/Practice/Product > Practical assessment/practical skills demonstration - (40%) - Individual.


Cairns, Study Period 1, Internal
Census Date 24-Mar-2022
Coord/Lect: Dr Yang Du.
Workload expectations:

The student workload for this 3 credit point subject is approximately 130 hours.

  • 26 hours lectures (didactic or interactive)
  • 39 hours practicals
  • assessment and self-directed study

Note: Minor variations might occur due to the continuous Subject quality improvement process, and in case of minor variation(s) in assessment details, the Subject Outline represents the latest official information.